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Materials, processing and reliability of low temperature bonding in 3D chip stacking
Zhang, Liang1,2; Liu, Zhi-quan2; Chen, Sinn-Wen3; Wang, Yao-dong4; Long, Wei-Min5; Guo, Yong-huan1; Wang, Song-quan1; Ye, Guo1; Liu, Wen-yi1
Corresponding AuthorZhang, Liang(zhangliang@jsnu.edu.cn)
2018-06-25
Source PublicationJOURNAL OF ALLOYS AND COMPOUNDS
ISSN0925-8388
Volume750Pages:980-995
AbstractDue to the advantages of small form factor, high performance, low power consumption, and high density integration, three-dimensional integrated circuits (3D ICs) have been generally acknowledged as the next generation semiconductor technology. Low temperature bonding is the key technology to ensure the chip (or wafer) stacking in 3D ICs. In this paper, different low temperature bonding methods for chip (or wafer) stacking were reviewed and described systematically. Materials, processing and reliability will be extremely important, their effects on the 3D IC structure were addressed in detail, the challenging reliability issues may be considered as the major concern in the future work. The latest development of low temperature bonding in 3D ICs is also given here, which helpful may provide a reference for the further study of low temperature bonding. (C) 2018 Elsevier B.V. All rights reserved.
Keyword3D IC Low temperature bonding Bonding method Reliability
Funding OrganizationNatural Science Foundation of China ; Qing Lan Project ; China Postdoctoral Science Foundation ; Six talent peaks project in Jiangsu Province ; International Cooperation Project ; Major State Research Development Program of China ; Doctor Talent Project of Jiangsu Normal University
Indexed BySCI
Language英语
Funding ProjectNatural Science Foundation of China[51475220] ; Qing Lan Project ; China Postdoctoral Science Foundation[2016M591464] ; Six talent peaks project in Jiangsu Province[XCL-022] ; International Cooperation Project[2015DFA50470] ; Major State Research Development Program of China[2017YFB0305500] ; Doctor Talent Project of Jiangsu Normal University[14XLR025]
WOS Research AreaChemistry ; Materials Science ; Metallurgy & Metallurgical Engineering
WOS SubjectChemistry, Physical ; Materials Science, Multidisciplinary ; Metallurgy & Metallurgical Engineering
WOS IDWOS:000432668500118
PublisherELSEVIER SCIENCE SA
Citation statistics
Cited Times:35[WOS]   [WOS Record]     [Related Records in WOS]
Document Type期刊论文
Identifierhttp://ir.imr.ac.cn/handle/321006/128361
Collection中国科学院金属研究所
Corresponding AuthorZhang, Liang
Affiliation1.Jiangsu Normal Univ, Sch Mechatron Engn, Xuzhou 221116, Peoples R China
2.Chinese Acad Sci, Inst Met Res, Shenyang 110016, Liaoning, Peoples R China
3.Natl Tsing Hua Univ, Dept Chem Engn, Hsinchu, Taiwan
4.Intel Corp, 5000W Chandler Blvd, Phoenix, AZ 85226 USA
5.Zhengzhou Res Inst Mech Engn, State Key Lab Adv Brazing Filler Met & Technol, Zhengzhou 450001, Henan, Peoples R China
Recommended Citation
GB/T 7714
Zhang, Liang,Liu, Zhi-quan,Chen, Sinn-Wen,et al. Materials, processing and reliability of low temperature bonding in 3D chip stacking[J]. JOURNAL OF ALLOYS AND COMPOUNDS,2018,750:980-995.
APA Zhang, Liang.,Liu, Zhi-quan.,Chen, Sinn-Wen.,Wang, Yao-dong.,Long, Wei-Min.,...&Liu, Wen-yi.(2018).Materials, processing and reliability of low temperature bonding in 3D chip stacking.JOURNAL OF ALLOYS AND COMPOUNDS,750,980-995.
MLA Zhang, Liang,et al."Materials, processing and reliability of low temperature bonding in 3D chip stacking".JOURNAL OF ALLOYS AND COMPOUNDS 750(2018):980-995.
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